In any system on a chip (SoC), a circuit such as cache operates not at all times. If the leakage path is cut while the circuit is not operating, the energy consumption can be reduced because no current leaks.
The static RAM (SRAM) used in the conventional SoC consumes more energy at leakage than in active mode. If the power supply is disconnected to cut the leakage, however, the data stored will be erased. In order to reduce the leak energy, a voltage that would not erase the data may be applied (in retention mode) in some cases. However, the electrostatic capacitance of the SRAM power supply is so large that the leak current may not be reduced even if the power supply is disconnected frequently.
In order to reduce the leak current, it is proposed that an MRAM should be used as nonvolatile memory. The MRAM can, however, hardly operate at high speed if the current flowing to each memory cell is small. This is because data is written in the memory cell when a current flows in the memory cell, and is read from the memory cell by detecting the current flowing in the memory cell. It is therefore desired to provide a magnetoresistive memory in which sufficient current flows in each memory cell and which can therefore operate at high speed.